MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1797

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

28.4.12 PWM Channel 5 Active Register (HW_PWM_ACTIVE5)
The PWM Channel 5 Active Register specifies the active time and inactive time for Channel
5.
HW_PWM_ACTIVE5: 0x0b0
HW_PWM_ACTIVE5_SET: 0x0b4
HW_PWM_ACTIVE5_CLR: 0x0b8
HW_PWM_ACTIVE5_TOG: 0x0bC
EXAMPLE
HW_PWM_ACTIVEn_WR(5, 0x000000ff);
Address:
Re-
28.4.13 PWM Channel 5 Period Register (HW_PWM_PERIOD5)
The PWM Channel 5 Period Register specifies the multi-chip attachment mode, clock
divider value, active high, low values and period.
HW_PWM_PERIOD5: 0x0c0
HW_PWM_PERIOD5_SET: 0x0c4
HW_PWM_PERIOD5_CLR: 0x0c8
Freescale Semiconductor, Inc.
set
Bit
W
R
INACTIVE
31
0
ACTIVE
31 16
Field
15 0
30
0
29
0
HW_PWM_ACTIVE5
28
0
Number of divided clock cycles to count from the beginning of the period before changing the output from
the active state to the inactive state. The internal count of the channel is compared for greater than this
value to change to the inactive state.
Number of divided clock cycles to count from the beginning of the period before changing the output to the
active state. The internal count of the channel is compared for greater than this value to change to the active
state.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
INACTIVE
24
0
23
0
HW_PWM_ACTIVE5 field descriptions
8006_4000h base + B0h offset = 8006_40B0h
22
0
21
0
20
0
// Set active and inactive counts
19
0
18
0
17
0
16
0
15
0
Description
14
0
Chapter 28 Pulse-Width Modulator (PWM) Controller
13
0
12
0
11
0
10
0
0
9
ACTIVE
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
1797
0
0