MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1441

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
20.4.19 LOCK Shadow Register OTP Bank 2 Word 0
Shadow register for OCOTP Lock Status Value (ADDR = 0x10). Copy of the state of the
OTP lock regions. Copied from the OTP upon reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS]
Shadowed memory mapped access to OTP bank 2, word 0 (ADDR = 0x10).
Address:
Freescale Semiconductor, Inc.
Reset
Reset
Bit
Bit
W
W
R
R
ROM7
ROM6
ROM5
ROM4
Field
31
30
29
28
SRK
31
15
0
0
HW_OCOTP_LOCK
(HW_OCOTP_LOCK)
30
14
UNALLOCATED
0
0
Status of ROM use region write lock bits (ADDR = 0x1F). When set, word 0x1F in the ROM region is locked.
Status of ROM use region write lock bits (ADDR = 0x1E). When set, word 0x1E in the ROM region is locked.
Status of ROM use region write lock bits (ADDR = 0x1D). When set, word 0x1D in the ROM region is locked.
Status of ROM use region write lock bits (ADDR = 0x1C). When set, word 0x1C in the ROM region is locked.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_OCOTP_LOCK field descriptions
8002_C000h base + 120h offset = 8002_C120h
27
11
0
0
26
10
0
0
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
Chapter 20 On-Chip OTP (OCOTP) Controller
21
0
5
0
PIN
20
0
4
0
OPS
19
0
0
3
UN2
18
0
0
2
UN1
17
0
0
1
UN0
1441
16
0
0
0

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