MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1671

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

26.4.10 ENET MAC Transmit Control Register (HW_ENET_MAC_TCR)
Address:
Freescale Semiconductor, Inc.
Reset
Reset
TX_ADDR_SEL
TX_CRC_FWD
TX_ADDR_INS
Bit
Bit
W
W
RSRVD0
R
R
LOOP
31 10
Field
Field
7 5
0
9
8
31
15
0
0
HW_ENET_MAC_TCR
30
14
0
0
Internal loopback. If set, transmitted frames are looped back internal to the device and transmit MII output
signals are not asserted. When asserted the controller signal ena_loop is set to 1.
Reserved bits. Write as 0.
Forward frame from application with CRC. When set (1) the transmitter will not append any CRC to transmitted
frames as it is expecting a frame with crc from the application.
When cleared (0, default) the toplevel input pin ff_tx_crc_fwd controls if the frame has a crc from the
application (1) or not (0) (i.e. the register bit is OR'ed with ff_tx_crc_fwd input).
Set MAC address on transmit. If enabled (Set to 1) the MAC overwrites the source MAC address with the
programmed MAC address according to TX_ADDR_SEL. If disabled (Set to reset value 0), the source MAC
address is not modified by the MAC.
Source MAC address select on transmit. If register TX_ADDR_INS is set to 1 the MAC address that is used
to overwrite the source MAC address:
000: Node MAC Address programmed on PADDR1/2 registers is used as the source address.
100: Supplemental MAC Address 0 programmed on SMAC_0_0 and SMAC_0_1 registers is used as the
source address.
RSRVD0[15:10]
29
13
0
0
HW_ENET_MAC_RCR field descriptions (continued)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_ENET_MAC_TCR field descriptions
27
11
0
0
800F_0000h base + C4h offset = 800F_00C4h
26
10
0
0
CRC_
FWD
TX_
25
0
0
9
RSRVD0[31:16]
24
0
0
8
Description
Description
23
0
TX_ADDR_SEL
0
7
22
0
0
6
21
0
5
0
Chapter 26 Ethernet Controller (ENET)
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
GTS
1671
16
0
0
0