MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1266

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Operation
16.2.4 Data Buffers in System Memory
While the data on the flash is interleaved with parity symbols, the BCH assumes that the
data buffers in memory are contiguous. Metadata read from the flash will be stored to the
location pointed to by the HW_GPMI_AUXILIARY register and data will be written to
the address specified in the HW_GPMI_PAYLOAD register as is shown in
Figure
16-4.
Since the number of blocks on a flash page is programmable, the BCH also writes individual
block correction status to the auxiliary pointer at the word-aligned address following the
end of the metadata. Optionally, the computed syndromes may also be written to the auxiliary
area if the DEBUGSYNDROME bit is set in the control register.
As blocks complete processing, the bus master will accumulate the status for each block
and write it to the auxiliary data buffer following the metadata. The metadata area will be
padded with 0's until the next word boundary and the status for blocks 0-3 will be written
to the next word. The status for subsequent blocks will then be written to the buffer. The
status for the first block (metadata block) is also stored in the STATUS_BLK0 register in
the BCH_STATUS register. The completion codes for the blocks are indicated in the
Table
16-3. Note that the definition of the bytes and their ordering in the auxiliary and payload
storage areas are user defined. When this data is read back from the flash and put into
memory, it will resemble the original buffer that was written out to the flash.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
1266
Freescale Semiconductor, Inc.