MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 66

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Section Number
66
29.4.8
29.4.9
29.4.10
Layer 2 Look Up Engine...............................................................................................................................?
Layer 2 Lookup Tasks Overview...................................................................................................................?
Frame Forwarding Tasks................................................................................................................................?
29.4.8.1
29.4.8.2
29.4.8.3
29.4.9.1
29.4.9.2
29.4.9.3
29.4.9.4
29.4.9.5
29.4.10.1
29.4.10.2
29.4.10.3
29.4.10.4
29.4.10.5
29.4.10.6
29.4.10.7
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
29.4.10.3.1
29.4.10.3.2
29.4.10.3.3
29.4.10.6.1
29.4.10.6.2
29.4.10.6.3
29.4.10.6.4
29.4.10.6.5
29.4.10.7.1
29.4.10.7.2
29.4.10.7.3
Overview...............................................................................................................................1819
Hash Code.............................................................................................................................1820
Address Memory...................................................................................................................1820
MAC Address Lookup..........................................................................................................1821
Forced Forwarding................................................................................................................1822
Learning................................................................................................................................1822
Migration...............................................................................................................................1824
Aging.....................................................................................................................................1824
Overview...............................................................................................................................1824
VLAN Domain Verification..................................................................................................1825
Broadcast Multicast VLAN Domain Resolution..................................................................1826
Port Mirroring.......................................................................................................................1828
Protocol Snooping.................................................................................................................1829
Bridge Protocol Frame Resolution........................................................................................1829
Congestion Resolution..........................................................................................................1830
Overview..............................................................................................................1826
VLAN Resolution Table......................................................................................1826
VLAN Switching and Resolution Mechanism....................................................1827
Overview..............................................................................................................1829
Input Port Blocking.............................................................................................1829
Input Port Learning Disable................................................................................1829
Management Port Forwarding.............................................................................1829
Management Frame Forwarding.........................................................................1830
Overview..............................................................................................................1830
Unique Destination (one input to one output).....................................................1830
Multiple Destinations (Flooding)........................................................................1830
Title
Freescale Semiconductor, Inc.
Page

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