MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2231
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MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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36.3.2 SPDIF Status Register (HW_SPDIF_STAT)
HW_SPDIF_STAT: 0x010
HW_SPDIF_STAT_SET: 0x014
HW_SPDIF_STAT_CLR: 0x018
HW_SPDIF_STAT_TOG: 0x01C
The SPDIF Status Register provides the status of the SPDIF converter.
EXAMPLE
unsigned TestBit = HW_SPDIF_STAT.PRESENT;
Address:
Freescale Semiconductor, Inc.
Reset
OVERFLOW_IRQ
FIFO_ERROR_
Bit
W
IRQ_EN
R
FIFO_
Field
RUN
2
1
0
31
1
HW_SPDIF_STAT
30
0
This bit is set by hardware if the FIFO overflows during SPDIF transmission. Reset this bit by writing a one
to the SCT clear address space and not by a general write.
Set this bit to one to enable a SPDIF interrupt request on FIFO overflow or underflow status conditions.
Setting this bit to one causes the SPDIF to begin converting data. The actual conversion will begin when
the SPDIF FIFO is filled (4 or 8 words written, depending upon sample word format, i.e., 16 or 32 bits).
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_SPDIF_CTRL field descriptions (continued)
28
0
8005_4000h base + 10h offset = 8005_4010h
27
0
26
0
Chapter 36 Sony-Philips Digital Interface Format Transmitter (SPDIF)
25
0
24
0
RSRVD1[30:16]
Description
23
0
22
0
21
0
20
0
19
0
18
0
17
0
2231
16
0
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