MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2237

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Writing a 32-bit value to the register corresponds to pushing that 32-bit value into the SPDIF
FIFO. The DMA writes 32-bit values to this register. In 32-bit-per-sample mode, the DMA
is writing either one full left sample or one full right sample for each write to this register.
For 16-bit mode, the DMA is writing a 16-bit left sample and a 16-bit right sample for each
32-bit write to this register.
EXAMPLE
to the left channel in 16-bit mode
channel in 32-bit per sample mode.
Address:
Re-
36.3.7 SPDIF Version Register (HW_SPDIF_VERSION)
The SPDIF Version Register is read-only and is used for debug to determine the
implementation version number for the block.
EXAMPLE
if (HW_SPDIF_VERSION.B.MAJOR != 1)
Freescale Semiconductor, Inc.
set
Bit
W
R
Error();
31
0
31 16
HIGH
LOW
Field
15 0
30
0
29
0
HW_SPDIF_DATA
28
0
For 16-bit mode, this field contains the entire right channel sample. For 32-bit mode, this field contains the
16 MSBs of the 32-bit sample (either left or right).
For 16-bit mode, this field contains the entire left channel sample. For 32-bit mode, this field contains the
16 LSBs of the 32-bit sample (either left or right).
27
0
HW_SPDIF_DATA = 0x12345678; // write 0x1234 to the right channel and 0x5678
HW_SPDIF_DATA = 0x12345678; // write 0x12345678 to either the left or right
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
HIGH
0
23
0
8005_4000h base + 50h offset = 8005_4050h
HW_SPDIF_DATA field descriptions
22
0
21
0
20
0
19
0
Chapter 36 Sony-Philips Digital Interface Format Transmitter (SPDIF)
18
0
17
0
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
0
9
LOW
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
2237
0
0