MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2017

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

31.7.40 Endpoint Control 0 Register (HW_USBCTRL_ENDPTCTRL0)
Every Device will implement Endpoint0 as a control endpoint. The default value of this
register is 0x00800080.
Freescale Semiconductor, Inc.
RSVD0
23 16
ERCE
ETCE
Field
15 8
7 0
HW_USBCTRL_ENDPTCOMPLETE field descriptions (continued)
Endpoint Transmit Complete Event.
Each bit indicates a transmit event (IN/INTERRUPT) occurred and software should read the corresponding
endpoint queue to determine the endpoint status. If the corresponding IOC bit is set in the Transfer Descriptor,
then this bit will be set simultaneously with the USBINT. Writing a 1 will clear the corresponding bit in this
register.
ETCE[7] = Endpoint 7.
ETCE[6] = Endpoint 6.
ETCE[5] = Endpoint 5.
ETCE[4] = Endpoint 4.
ETCE[3] = Endpoint 3.
ETCE[2] = Endpoint 2.
ETCE[1] = Endpoint 1.
ETCE[0] = Endpoint 0.
Reserved.
Endpoint Receive Complete Event.
Each bit indicates a received event (OUT/SETUP) occurred and software should read the corresponding
endpoint queue to determine the transfer status. If the corresponding IOC bit is set in the Transfer Descriptor,
then this bit will be set simultaneously with the USBINT. Writing a 1 will clear the corresponding bit in this
register.
ERCE[7] = Endpoint 7.
ERCE[6] = Endpoint 6.
ERCE[5] = Endpoint 5.
ERCE[4] = Endpoint 4.
ERCE[3] = Endpoint 3.
ERCE[2] = Endpoint 2.
ERCE[1] = Endpoint 1.
ERCE[0] = Endpoint 0.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 31 USB High-Speed On-the-Go Host Device Controller
Description
2017