MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1653

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

If a frame is received on the FIFO interface with an error (for example, Signal ff_rx_err
asserted) the frame is subsequently transmitted with the MII mii_tx_err error signal for one
clock cycle at any time during the packet transfer.
26.3.18.2 Transmit with Collision - Half Duplex
When a collision is detected during a frame transmission (MII signal mii_col asserted), the
MAC stops the current transmission, sends a 32-Bit jam pattern and re-transmits the current
frame (See section
26.3.18.3 Receive
On Receive, all signals are sampled on the rx_clk rising edge. The MII data enable signal
mii_rx_dv is asserted by the PHY to indicate the start of a new frame and remains asserted
until the last byte of the frame is present on mii_rx_d(3:0) bus. Between frames, mii_rx_dv
remains de-asserted.
Freescale Semiconductor, Inc.
Figure 26-29. MII Transmit Operation - Transmission with Collision
Figure 26-28. MII Transmit Operation - Errored Frame
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Collision Detection in Half Duplex Mode
mii_tx_d(3:0)
mii_tx_d(3:0)
mii_tx_err
mii_tx_en
mii_tx_en
mii_tx_err
tx_dk
tx_clk
mii_tx_d(3:0)
Preamble
Preamble
mii_tx_err
mii_tx_en
Figure 26-27. MII Transmit Operation
mii_col
mii_crs
tx_clk
5
5
SFD
SFD
5
Jam
Chapter 26 Ethernet Controller (ENET)
for detail).
CRC-32
CRC-32
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