MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2258

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
37.5.7 HSADC Debug Information 0 Register (HW_HSADC_DBG_INFO0)
The HSADC Debug Information Register provides some useful information for debugging.
This register contains the active time and inactive time programming parameters for Channel
2.
EXAMPLE
Address:
2258
Reset
Reset
HW_HSADC_DBG_INFO0_RD();
HSADC_FSM_
DMA_FSM_
FIFO_DATA
Bit
Bit
W
W
RSRVD1
R
R
STATE
STATE
Field
31 0
Field
31 6
5 3
2 0
31
15
0
0
HW_HSADC_DBG_INFO0 8000_2000h base + 60h offset = 8000_2060h
30
14
0
0
The FIFO data interface for DMA or host CPU to read data from the FIFO internal HSADC module.
Reserved.
The current state of dma slave state machine.
The current state of hsadc state machine.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_HSADC_DBG_INFO0 field descriptions
28
12
HW_HSADC_FIFO_DATA field descriptions
0
0
RSRVD1[15:6]
27
11
0
0
26
10
0
0
25
0
0
9
RSRVD1[31:16]
24
0
0
8
Description
Description
23
0
0
7
22
0
0
6
DMA_FSM_STATE
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
HSADC_FSM_
STATE
17
0
0
1
16
0
0
0

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