MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1012

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Operation
The CHAIN bit should be set if the NEXT_COMMAND_ADDRESS field has a valid
pointer to the next work packet. When set, this bit causes the channel to update its pointer
to the next packet. The CHAIN_CONTINUOUS bit is similar, but it indicates that the next
packet follows immediately after the current packet. This allows software to generate
templates of operations without regard to the actual physical addresses used, which makes
programming easier, especially in a virtual memory environment.
If the INTERRUPT_ENABLE bit is set, the channel generates an interrupt to the processor
after completing the work for this packet. When the interrupt is issued, the packet will have
been completely processed, including the update of the status/payload fields in the work
packet.
Each channel contains an eight-bit counting semaphore that controls whether it is in the run
or idle state. When the semaphore in non-zero, the channel is ready to run and process
commands. Whenever a command finishes its operation, it checks the DECR_SEMAPHORE
bit. If set, it decrements the counting semaphore. If the semaphore goes to 0 as a result, then
the channel enters the idle state and remains there until the semaphore is incremented by
software. When the semaphore goes to non-zero and the channel is in its idle state, it then
uses the value in the NEXT_COMMAND_ADDRESS field to begin processing.
1012
TAG
HASH
0
0
0
1
1
1
Cipher
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
0
0
1
0
0
1
All Others
Table 13-5. DCP Function Enable Bits
Blit
0
1
0
0
0
0
Memcopy
X
0
0
0
1
0
Simple memcopy operation.
Blit operation.
Simple encrypt/decrypt operation.
Simple hash. Only reads performed.
Memcopy and hash operation.
Hash with encryption/decryption.
Invalid setup.
Description
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