MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1554

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Message Buffer Structure
1. For Tx MBs (see
SRR Substitute Remote Request
Fixed recessive bit, used only in extended format. It must be set to '1' by the user for
transmission (Tx Buffers) and will be stored with the value received on the CAN bus for
Rx receiving buffers. It can be received as either recessive or dominant. If FlexCAN receives
this bit as dominant, then it is interpreted as arbitration loss.
1 = Recessive value is compulsory for transmission in Extended Format frames
0 = Dominant is not a valid value for transmission in Extended Format frames
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Rx New Frame
Rx Code BE-
RTR
X
X
0
1
0
0
0XY1
FORE
1
Initial Tx code
Table
1000
1001
1100
1100
1010
1110
BUSY: Flexcan is updating the con-
tents of the MB. The CPU must not
access the MB.
Description
25-3), the BUSY bit should be ignored upon read, except when the AEN bit is set in the MCR register.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 25-3. Message Buffer Code for Tx buffers
Code after successful
transmission
1000
0100
1010
1010
—
—
INACTIVE: MB does not participate in the arbitration process.
ABORT: MB was configured as Tx and CPU aborted the transmission.
This code is only valid when AEN bit in MCR is asserted. MB does
not participate in the arbitration process.
Transmit data frame unconditionally once. After transmission, the MB
automatically returns to the INACTIVE state.
Transmit remote frame unconditionally once. After transmission, the
MB automatically becomes an Rx MB with the same ID.
Transmit a data frame whenever a remote request frame with the
same ID is received. This MB participates simultaneously in both the
matching and arbitration processes. The matching process compares
the ID of the incoming remote request frame with the ID of the MB. If
a match occurs this MB is allowed to participate in the current arbitra-
tion process and the Code field is automatically updated to '1110' to
allow the MB to participate in future arbitration runs. When the frame
is eventually transmitted successfully, the Code automatically returns
to '1010' to restart the process again.
This is an intermediate code that is automatically written to the MB
by the MBM as a result of match to a remote request frame. The data
frame will be transmitted unconditionally once and then the code will
automatically return to '1010'. The CPU can also write this code with
the same effect.
Rx Code AFTER
Description
Rx New Frame
0010
0110
An EMPTY buffer was written with a new frame
(XY was 01).
A FULL/OVERRUN buffer was overwritten (XY
was 11).
Comment
Freescale Semiconductor, Inc.