MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2090

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
33.4.4 LCDIF Horizontal and Vertical Valid Data Count Register
This register tells the LCDIF how much data will be sent for this frame, or transaction. The
total number of words is a product of the V_COUNT and H_COUNT fields. The word size
is specified by the WORD_LENGTH field.
This register gives the dimensions of the input frame. For normal operation, but V_COUNT
and H_COUNT should be non-zero.
Address:
Re-
2090
set
INITIAL_DUMMY_
Bit
READ_MODE_6_
W
R
NUM_PACKED_
READ_MODE_
SUBWORDS
V_COUNT
BIT_INPUT
31
0
RSRVD1
RSRVD0
31 16
READ
Field
Field
6 4
3 1
30
0
8
7
0
29
0
(HW_LCDIF_TRANSFER_COUNT)
HW_LCDIF_TRANSFER_COUNT 8003_0000h base + 30h offset = 8003_0030h
28
0
Number of horizontal lines per frame which contain valid data. In DOTCLK mode, V_COUNT should be the
same as the number of active horizontal lines in a progressive frame. In DVI mode, V_COUNT should be
the number of active horizontal lines per frame, and not per field.
27
0
Setting this bit to 1 indicates to LCDIF that even though LCD_DATABUS_WIDTH is set to 8 bits, the input
data is actually only 6 bits wide and exists on D5-D0.
Reserved bits. Write as 0.
Indicates the number of valid 8/16/18/24-bit subwords that will be packed in the 32-bit HW_LCDIF_DATA
register in the read mode. The subword size (8,16, 18 or 24 bits) is determined by the
LCD_DATABUS_WIDTH field. The swizzle operation is performed after
READ_MODE_NUM_PACKED_SUBWORDS number of data has been received from the interface and
stored in the little-endian format. For example, if LCD_DATABUS_WIDTH is set to 8-bit and data to be
read back has to be stored in memory in 24-bit unpacked RGB format, set
READ_MODE_NUM_PACKED_SUBWORDS to 0x3 so that each 32-bit word will contain only 3 valid bytes
(RGB). Maximum value of READ_MODE_NUM_PACKED_SUBWORDS is 4 for 8-bit databus, 2 for 16-bit
databus and 1 for 18/24-bit databus.
The value in this field determines the number of dummy 8/16/18/24-bit subwords that have to be read back
from the LCD panel/controller. They will then not be stored in the read FIFO.
Reserved bits. Write as 0.
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_LCDIF_TRANSFER_COUNT field descriptions
25
0
HW_LCDIF_CTRL2 field descriptions (continued)
V_COUNT
24
0
23
0
22
0
21
0
20
0
19
0
18
0
17
0
16
1
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
H_COUNT
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0