MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 554

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
7.5.37 APBX DMA Channel 4 Buffer Address Register
The APBX DMA Channel 4 buffer address register contains a pointer to the data buffer for
the transfer. For immediate forms, the data is taken from this register. This is a byte address
which means transfers can start on any byte boundary.
This register holds a pointer to the data buffer in system memory. After the command values
have been read into the DMA controller and the device associate with this channel, then
the DMA transfer will begin, to or from the buffer pointed to by this register.
Address:
Re-
554
set
Bit
W
R
COMMAND
ADDRESS
31
0
CHAIN
Field
31 0
Field
1 0
30
0
2
29
0
(HW_APBX_CH4_BAR)
HW_APBX_CH4_BAR
28
0
Address of system memory buffer to be read or written over the AHB bus.
27
A value of one indicates that another command is chained onto the end of the current command structure.
At the completion of the current command, this channel will follow the pointer in HW_APBX_CH4_CMDAR
to find the next command.
This bitfield indicates the type of current command:
00- NO DMA TRANSFER
01- write transfers, i.e. data sent from the APBX device (APB PIO Read) to the system memory (AHB master
write).
10- read transfer
11- reserved
0x0
0x1
0x2
0
26
0
HW_APBX_CH4_CMD field descriptions (continued)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
NO_DMA_XFER — Perform any requested PIO word transfers but terminate command before any
DMA transfer.
DMA_WRITE — Perform any requested PIO word transfers and then perform a DMA transfer from
the peripheral for the specified number of bytes.
DMA_READ — Perform any requested PIO word transfers and then perform a DMA transfer to the
peripheral for the specified number of bytes.
25
0
24
0
HW_APBX_CH4_BAR field descriptions
23
0
22
0
8002_4000h base + 2F0h offset = 8002_42F0h
21
0
20
0
19
0
18
0
17
0
ADDRESS
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0