MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1858

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
Address:
1858
Reset
Reset
ING_DA_MATCH
ING_SA_MATCH
EG_DA_MATCH
EG_SA_MATCH
ING_MAP_
EG_MAP_
Bit
Bit
W
W
RSRVD0
ENABLE
ENABLE
R
R
31 11
Field
10
9
8
7
6
5
31
15
0
0
HW_ENET_SWI_MIRROR_CONTROL
800F_8040h
30
14
0
0
RSRVD0[15:11]
Reserved bits. Write as 0.
If set, only frames transmitted on an egress port with a destination address matching the value programmed
in register MIRROR_EDST are mirrored. Other frames are not mirrored.
Note: if the egress map is not enabled (eg_map_enable=0) then any frame with a matching destination
address will be mirrored.
If set, only frames transmitted on an egress port with a source address matching the value programmed in
register MIRROR_ESRC are mirrored. Other frames are not mirrored.
Note: if the egress map is not enabled (eg_map_enable=0) then any frame with a matching source address
will be mirrored.
If set, only frames received on an ingress port with a destination address matching the value programmed
in register MIRROR_IDST are mirrored. Other frames are not mirrored.
Note: if the ingress map is not enabled (ing_map_enable=0) then any frame with a matching destination
address will be mirrored.
If set, only frames received on an ingress port with a source address matching the value programmed in
register MIRROR_ISRC are mirrored. Other frames are not mirrored.
Note: if the ingress map is not enabled (ing_map_enable=0) then any frame with a matching source address
will be mirrored.
If set the egress map is enabled (MIRROR_EG_MAP). A frame forwarded to an output port that has a bit
set in the egress map will be mirrored.
If cleared, the egress port map has no effect.
If set the ingress map is enabled (MIRROR_ING_MAP). A frame received on an ingress port that has a bit
set in the ingress map will be mirrored.
If cleared, the ingress port map has no effect.
HW_ENET_SWI_MIRROR_CONTROL field descriptions
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
26
10
0
0
25
0
0
9
800F_8000h base + 40h offset =
RSRVD0[31:16]
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
PORTX
17
0
0
1
16
0
0
0