MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1852
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
- MCIMX283DVM4B PDF datasheet
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Programmable Registers
Address:
1852
Reset
Reset
TRANSMITTED
PORTMASK
MESSAGE_
PRIORITY
Bit
Bit
DISCARD
W
W
RSRVD2
RSRVD1
RSRVD0
ENABLE
R
R
31 19
18 16
15 13
PORT
Field
12 8
3 0
7
6
5
4
31
15
0
0
PRIORITY
HW_ENET_SWI_MGMT_CONFIG 800F_8000h base + 20h offset = 800F_
8020h
30
14
0
0
Reserved bits. Write as 0.
Portmask for transmission of BPDU frames as defined in 5.10.6.4 page 44. When the management port
transmits a BPDU frame to the switch, it is forwarded to all ports in this portmask (bit16=port0, bit17=port1,
bit 18=port2).
Priority to use for transmitted management frames. Used to e.g. put a management frame in a high-priority
output queue for fast delivery.
Reserved bits. Write as 0.
If set, BPDU frames are discarded always. Setting has no effect, when the enable bit is set.
If set, all BPDU frames are forwarded exclusively to the management port specified in bits 3:0.
If cleared, BPDU frames are forwarded as any other frame, or discarded if the discard bit is set.
Set (latched) when a BPDU frame as defined in 5.10.6.4 page 44 was transmitted from the management
port to any output port. Bit is reset by writing into the register.
Reserved bits. Write as 0.
The Port number of the port that should act as a management port.
Relevant to all functions that forward frames to the management port (i.e. BPDU processing, snooping).
Note: It must be set 0 in this switch configuration (Port 0 to DMA0 is the management port).
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_SWI_MGMT_CONFIG field descriptions
28
12
0
0
27
11
0
0
RSRVD1
26
10
0
0
RSRVD2
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
PORT
PORTMASK
17
0
0
1
16
0
0
0
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