MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 335
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MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
- MCIMX283DVM4B PDF datasheet
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5.4.138 Interrupt Collector Debug Register 0 (HW_ICOLL_DEBUG)
The contents of this register will be defined as the hardware is developed.
HW_ICOLL_DEBUG: 0x1120
HW_ICOLL_DEBUG_SET: 0x1124
HW_ICOLL_DEBUG_CLR: 0x1128
HW_ICOLL_DEBUG_TOG: 0x112C
This register provides diagnostic visibility into the IRQ request state machine and its various
inputs.
EXAMPLE
if (BF_RD(ICOLL_DEBUG, LEVEL_REQUESTS) != HW_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL3)
TPRINTF(TP_MED, ("ICOLL INSERVICE = 0x%x\n", BF_RD(ICOLL_DEBUG, INSERVICE)));
TPRINTF(TP_MED, ("ICOLL STATE = 0x%x\n", BF_RD(ICOLL_DEBUG, VECTOR_FSM)));
Address:
Freescale Semiconductor, Inc.
Reset
Reset
Error();
PRIORITY
Bit
Bit
W
W
R
R
Field
1 0
31
15
0
0
HW_ICOLL_DEBUG
INSERVICE
30
14
0
0
Set the priority level for this interrupt, 0x3 is highest, 0x0 is lowest (weakest).
0x0
0x1
0x2
0x3
HW_ICOLL_INTERRUPT127 field descriptions (continued)
29
13
RSRVD1
0
0
LEVEL0 — level 0, lowest or weakest priority
LEVEL1 — level 1
LEVEL2 — level 2
LEVEL3 — level 3, highest or strongest priority
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
8000_0000h base + 1120h offset = 8000_1120h
27
11
0
0
LEVEL_REQUESTS
26
10
0
0
25
0
0
9
24
0
0
8
Description
REQUESTS_BY_LEVEL
23
0
0
7
22
0
0
6
VECTOR_FSM
21
0
5
0
Chapter 5 Interrupt Collector (ICOLL)
20
0
4
0
19
RSRVD2
0
0
3
18
0
0
2
FIQ
17
0
0
1
IRQ
16
0
0
0
335
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