MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1642

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
IEEE 1588 Functions
26.3.13.2.1 Overview
The Adjustable Timer Module (TSM) implements the Free Running Counter (FRC), the
timer, which is used to generate the timestamps. The FRC operates with the clock
CLK_ENET_TIME, which can be set to any value depending on the system requirements.
However, it is recommended to choose a period, which is an integer value (for example, 5
ns, 6 ns, 8 ns, but not 7.5 ns) to implement a precise timer.
The current value of the FRC is available on the Core toplevel pins frc().
Through dedicated correction logic (see below), the timer can be adjusted allowing
synchronization to a remote master and provide a synchronized timing reference to the local
system. The timer can be configured to cause an interrupt after a fixed period of time to
allow synchronization of software timers or perform other synchronized system functions.
The timer is usually used to implement a period of 1 second, hence, its value would range
from 0 to (1*10
the seconds and hours time values and so on as necessary.
26.3.13.2.2 Adjustable Timer Implementation
The adjustable timer consists of a programmable counter/accumulator and a correction
counter. The periods of both counters and its increment rate are freely configurable allowing
very fine tuning of the timer.
The counter is producing the current time. Each clock cycle (CLK_ENET_TIME), a constant
value is added to the current time as programmed in the ATIME_INC(4:0) register. The
value depends on the chosen clock frequency of CLK_ENET_TIME. For example, if the
CLK_ENET_TIME operates at 125 MHz, the increment would be set to 8 representing 8
ns.
The period, configured in register ATIME_EVT_PERIOD, defines the modulo when the
counter has to wrap around. In a typical implementation, the period is set to 1*10
counter wraps every 1 second and hence, all timestamps represent the absolute nanoseconds
1642
9
)-1. The period event can trigger an interrupt and software then can maintain
Figure 26-19. Adjustable Timer Implementation Detail
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Adjustable Timer
ATIME_EVT_PERICD
ATIME_CORR
Correction
Counter
frc_in(31:0)
Inc by normal correction
ATIME_INC(14:8)
correction Increment
Counter
mod
ATIME_INC(6:0)
normal Increment
FRC_SLAVE
current time
to intemal
modules
(MAC,capture/
compare)
frc(31:0)
Freescale Semiconductor, Inc.
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