MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1005

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
13.2.3 Hashing
The hashing module implements SHA-1 and SHA-256 hashing algorithms and a modified
CRC-32 checksum algorithm. These algorithms produce a signature for a block of data that
can be used to determine whether the data is intact.
The CRC-32 algorithm implements a 32-bit CRC algorithm similar to the one used by
Ethernet and many other protocols. The CRC differs from Unix cksum() function in three
ways:
The SHA-1 block implements a 160-bit hashing algorithm that operates on 512-bit (64-byte)
blocks as defined by US FIPS PUB 180-1 in 1995. The SHA-256 mode implements a 256-bit
hashing algorithm that operates on 512-bit (64-byte) blocks as defined by US FIPS PUB
180-2 in 2002. The purpose of the hashing module is to generate a unique signature for a
block of data that can be used to validate the integrity of the data by comparing the resulting
digest with the original digest.
Results from hash operations are written to the beginning of the payload for the descriptor.
The DCP also has the ability to check the resulting hash against a value in the payload and
issue an interrupt if a mismatch occurs.
Freescale Semiconductor, Inc.
• The CRC is initialized as 0xFFFFFFFF instead of 0x00000000.
• Logic pads zeros to a 32-bit boundary for trailing bytes.
• Logic does not post-pend the file length.
Initialization Vector (IV)
Figure 13-8. Cipher Block Chaining (CBC) Mode Decryption
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Key
Block Cipher
Decryption
Ciphertext
Plaintext
Key
Block Cipher
Decryption
Ciphertext
Plaintext
Key
Chapter 13 Data Co-Processor (DCP)
Block Cipher
Decryption
Ciphertext
Plaintext
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