MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1042
MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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Programmable Registers
HW_DCP_CH0STAT_SET: 0x124
HW_DCP_CH0STAT_CLR: 0x128
HW_DCP_CH0STAT_TOG: 0x12C
The interrupt status register is updated at the end of each work packet. If the interrupt bit
is set in the command packet's command field, an interrupt will be generated once the packet
has completed. In addition, the tag value from the command is stored in the TAG field so
that software can identify which command structure was the last to complete. If an error
occurs, the ERROR bit is set and processing of the command chain is halted.
Address:
1042
Reset
Reset
ERROR_CODE
Bit
Bit
W
W
R
R
31 24
23 16
Field
TAG
31
15
0
0
HW_DCP_CH0STAT
30
14
0
0
Indicates the tag from the last completed packet in the command structure
Indicates additional error codes for some error conditions.
0x01
0x02
0x03
0x04
0x05
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
NEXT_CHAIN_IS_0 — Error signalled because the next pointer is 0x00000000
NO_CHAIN — Error signalled because the semaphore is nonzero and neither chain bit is set
CONTEXT_ERROR — Error signalled because an error was reported reading/writing the context
buffer
PAYLOAD_ERROR — Error signalled because an error was reported reading/writing the payload
INVALID_MODE — Error signalled because the control packet specifies an invalid mode select (for
instance, blit + hash)
28
12
0
0
TAG
HW_DCP_CH0STAT field descriptions
RSVD0
8002_8000h base + 120h offset = 8002_8120h
27
11
0
0
26
10
0
0
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
ERROR_CODE
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0
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