MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 693

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

HW_PINCTRL_CTRL: 0x000
HW_PINCTRL_CTRL_SET: 0x004
HW_PINCTRL_CTRL_CLR: 0x008
HW_PINCTRL_CTRL_TOG: 0x00C
This register contains block-wide control bits and combined bank interrupt status bits. For
normal operation, write a 0x0 into this register.
Address:
Freescale Semiconductor, Inc.
Reset
Reset
PRESENT4
PRESENT3
PRESENT2
CLKGATE
Bit
Bit
W
W
RSRVD2
SFTRST
R
R
29 25
Field
31
30
24
23
22
31
15
1
0
HW_PINCTRL_CTRL
30
14
1
0
This bit must be set to zero to enable operation of any of the PINCTRL banks. When set to one, it forces a
block-level reset.
This bit must be set to zero for normal operation. When set to one, it disables the block clock.
Always write zeroes to this field.
GPIO Functionality Present. 0: GPIO functionality for Pin Control Bank 4 is not present in this product. 1:
GPIO functionality for Bank 4 is present.
GPIO Functionality Present. 0: GPIO functionality for Pin Control Bank 3 is not present in this product. 1:
GPIO functionality for Bank 3 is present.
GPIO Functionality Present. 0: GPIO functionality for Pin Control Bank 2 is not present in this product. 1:
GPIO functionality for Bank 2 is present.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_PINCTRL_CTRL field descriptions
RSRVD2
8001_8000h base + 0h offset = 8001_8000h
27
11
0
0
RSRVD1[15:5]
26
10
0
0
25
0
0
9
24
1
0
8
Description
23
1
0
7
22
1
0
6
Chapter 9 Pin Control and GPIO (PinCtrl)
21
1
5
0
20
1
4
0
19
0
0
3
RSRVD1[19:16]
18
0
0
2
17
0
0
1
16
0
0
0
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