MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1835

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

29.6 Reset and Stop Functions
29.6.1 Stop Controls
The register
controls have an effect on internal logic functions:
An external logic may use the controls to disable or enable the switch function as necessary.
29.6.2 Port Disable
The switch toplevel offers a disable input for each port (port_dis(2:0). When a pin is asserted
(1), the corresponding port enable bits within register
receive will be cleared.
This results in the following behavior:
Freescale Semiconductor, Inc.
• stop_en: no internal function.
• switch_en: when de-asserted, all DMA registers are cleared.
• switch_reset: no internal function.
• If the port-enable bits of port0 are cleared, it also resets the input buffer and output
buffer at the port0 DMA interface.
• The ready output to DMA0 (ff_tx_rdy0) will be asserted allowing the application
• If the transmit enable is cleared while the interface is currently transferring a frame
to continue writing data at the interface, which will be ignored (application flush).
No further transmitted frame status (tx_ts_val0) will be given (that is, for any
currently stored if any, as well as the currently ignored).
to the DMA, the frame is aborted (output buffer reset). The eop is not produced.
Therefore, the connected DMA module must be reset to ensure proper restart after
re-enabling the port.
MODE_CONFIG
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
offers several bits that control output pins. In addition, some
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
PORT_ENA
for both transmit and
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