MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 484

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
6.5.109 APBH DMA channel 14 Buffer Address Register
The APBH DMA channel 14 buffer address register contains a pointer to the data buffer
for the transfer. For immediate forms, the data is taken from this register. This is a byte
address which means transfers can start on any byte boundary.
Because channel 14 is not assigned to any peripheral, this register is of no practical usage
and just reserved for compatibility.
Address:
Re-
484
set
Bit
W
R
ADDRESS
31
0
COMMAND
Field
31 0
30
0
Field
1 0
29
0
HW_APBH_CH14_BAR
(HW_APBH_CH14_BAR)
28
0
Address of system memory buffer to be read or written over the AHB bus.
27
0
26
0
HW_APBH_CH14_CMD field descriptions (continued)
This bitfield indicates the type of current command:
00- NO DMA TRANSFER
01- Write transfers, that is, data sent from assigned peripheral (APB PIO Read) to the system memory
(AHB master write).
10- Read transfer
11- SENSE
0x0
0x1
0x2
0x3
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
NO_DMA_XFER — Perform any requested PIO word transfers but terminate command before
any DMA transfer.
DMA_WRITE — Perform any requested PIO word transfers and then perform a DMA transfer
from the peripheral for the specified number of bytes.
DMA_READ — Perform any requested PIO word transfers and then perform a DMA transfer
to the peripheral for the specified number of bytes.
DMA_SENSE — Perform any requested PIO word transfers and then perform a conditional
branch to the next chained device. Follow the NEXCMD_ADDR pointer if the perpheral sense
is false. Follow the BUFFER_ADDRESS as a chain pointer if the peripheral sense line is true.
0
HW_APBH_CH14_BAR field descriptions
23
0
22
0
8000_4000h base + 750h offset = 8000_4750h
21
0
20
0
19
0
18
0
17
0
ADDRESS
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0

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