MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1063

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

14.2.1 DDR SDRAM Address Mapping Options
The address structure of DDR SDRAM devices contains five fields. Each of these fields
can be individually addressed when accessing the DRAM. The address map for this EMI
is ordered as follows:
Chip Select
The maximum widths of the fields are based on the configuration settings. The actual widths
of the fields may be smaller if the device address width parameters (addr_pins,
eight_bank_mode, and column_size) are programmed differently.
14.2.2 Maximum Address Space
The maximum user address range is determined by the width of the memory datapath, the
number of chip select pins, and the address space of the DRAM device. The maximum
amount of memory can be calculated by the following formula:
chip-selects x bank x 2^(row + column) x datapath (unit: byte)
For this DRAM controller, the maximum values for these fields are as follows:
As a result, the maximum memory area supported by EMI module is 4 Gbytes. But in
i.MX28, the system memory-map limits the maximum accessible area to 1 Gbytes.
Freescale Semiconductor, Inc.
• Chip Select EMI supports 2 chip-select. The “Chip Select” field occupies 1-bit.
• Datapath EMI supports 16-bit data width for external DDR memory. The “Datapath”
• Bank The DDR memory device defines the bank number. The EMI supports 4 or 8
• Row, Column The DDR memory device defines the width of these fields
• Chip Selects = 2
• Bank : 4 or 8, max 8
• Row : max 15-bits
• Column : max 12-bits
• Datapath width = 2 bytes (16-bits)
field occupies 1-bit.
banks of DDR memory, which occupies 2 or 3-bits
Row
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Bank
Column
Data Path
Chapter 14 External Memory Interface (EMI)
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