MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1753

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
27.5.1 I2C Control Register 0 (HW_I2C_CTRL0)
The I2C Control Register specifies the reset state and the command and transfer size
information for the I2C controller.
HW_I2C_CTRL0: 0x000
HW_I2C_CTRL0_SET: 0x004
HW_I2C_CTRL0_CLR: 0x008
HW_I2C_CTRL0_TOG: 0x00C
This register is either written by the DMA or the CPU depending on the state of an I2C
transaction.
EXAMPLE
// turn off soft reset and clock gating
HW_I2C_CTRL0_CLR(BM_I2C_CTRL0_SFTRST | BM_I2C_CTRL0_CLKGATE);
Address:
Freescale Semiconductor, Inc.
Reset
Reset
8005_80D0
Absolute
address
Bit
Bit
W
W
(hex)
R
R
31
15
1
0
HW_I2C_CTRL0
I2C Version Register (HW_I2C_VERSION)
30
14
1
0
RUN
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
8005_8000h base + 0h offset = 8005_8000h
PRE_
Register name
ACK
HW_I2C memory map (continued)
27
11
0
0
26
10
0
0
25
0
0
9
XFER_COUNT
24
0
0
8
23
0
0
7
22
0
0
6
(in bits)
Width
32
21
0
5
0
Access
R
20
0
4
0
Reset value
0104_0000h
19
0
0
3
Chapter 27 Inter IC (I2C)
18
0
0
2
27.5.14/1774
17
0
0
1
Section/
page
1753
16
0
0
0

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