MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2281

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Address:
Freescale Semiconductor, Inc.
Reset
Reset
ANALOG_PWUP
ANALOG_PWDN
CYCLE_TIME
Bit
Bit
DISCARD
W
W
RSRVD5
FORCE_
FORCE_
RSRVD4
RSRVD3
RSRVD2
R
R
31 26
25 24
21 14
13 10
Field
9 8
7 6
23
22
31
15
RSRVD4
0
0
[15:14]
HW_LRADC_CTRL3
30
14
0
0
Reserved
This bit field specifies the number of samples to discard whenever the LRADC analog is first powered up.
0x0= discard first 3 samples before first capture
0x1= discard first sample before first capture
0x2= discard first 2 samples before first capture
0x3= discard first 3 samples before first capture
Set this bit to zero for normal operation. Setting it to one forces an analog power up, regardless of where
the digital state machine may be.
0x0
0x1
Set this bit to zero for normal operation. Setting it to one forces an analog power down, regardless of where
the digital state machine may be.
0x0
0x1
Reserved
Reserved
Changes the LRADC clock frequency. Note: the sample rate is one thirteenth of the frequency selected
here.
0x0
0x1
0x2
0x3
Reserved
29
13
RSRVD5
0
0
OFF — Turn it off.
ON — Turn it on.
ON — Turn it on.
OFF — Turn it off.
6MHZ — 6MHz clock.
4MHZ — 4MHz clock.
3MHZ — 3MHz clock.
2MHZ — 2MHz clock.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
RSRVD3
0
0
HW_LRADC_CTRL3 field descriptions
8005_0000h base + 30h offset = 8005_0030h
27
11
0
0
26
10
0
0
Chapter 38 Low-Resolution ADC (LRADC) and Touch-Screen Interface
CYCLE_TIME
DISCARD
25
0
0
9
24
0
0
8
Description
23
RSRVD2
0
0
7
22
0
0
6
HIGH_TIME
21
0
5
0
20
0
4
0
RSRVD4[21:16]
19
RSRVD1
0
0
3
18
0
0
2
17
0
0
1
2281
16
0
0
0