MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2313

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

38.5.23 LRADC Theshold1 Register (HW_LRADC_THRESHOLD1)
This register configures the channel threshold comparison functionality.
HW_LRADC_THRESHOLD1: 0x160
HW_LRADC_THRESHOLD1_SET: 0x164
HW_LRADC_THRESHOLD1_CLR: 0x168
HW_LRADC_THRESHOLD1_TOG: 0x16C
This register configures the channel threshold mechanism. The threshold field is compared
against the channel result value and if the programmed condition is met a status bit is set
and an interrrupt can also be generated.
EXAMPLE
Address:
Freescale Semiconductor, Inc.
Reset
Reset
BATTCHRG_
Bit
Bit
W
W
DISABLE
RSRVD1
ENABLE
R
R
31 25
Field
24
23
31
15
0
0
HW_LRADC_THRESHOLD1
0160h
30
14
0
0
Reserved
Set this bit to turn on the threshold functionality which starts the sampling of channel conversions for
comparison against the threshold value.
Enable this bit to cause the battery charger to shut off (HW_POWER_CHARGE_PWD_BATTCHRG will be
asserted) when the threshold event first asserts (edge triggers the PWD_BATTCHRG). Note: It is the
responsibility of software to ensure that the proper channels are programmed and selected so the
external battery temperature is being monitored by this threshold unit.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
RSRVD1
HW_LRADC_THRESHOLD1 field descriptions
28
12
0
0
27
11
0
0
8005_0000h base + 160h offset = 8005_
26
10
0
0
Chapter 38 Low-Resolution ADC (LRADC) and Touch-Screen Interface
25
0
0
9
VALUE[15:0]
24
0
0
8
Description
23
0
0
7
22
CHANNEL_SEL
0
0
6
21
0
5
0
20
0
4
0
SETTING
19
0
0
3
18
0
0
2
VALUE[17:16]
17
0
0
1
2313
16
0
0
0