MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1288

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
16.6.1 Hardware BCH ECC Accelerator Control Register
The BCH CTRL provides overall control of the hardware ECC accelerator
HW_BCH_CTRL: 0x000
HW_BCH_CTRL_SET: 0x004
HW_BCH_CTRL_CLR: 0x008
HW_BCH_CTRL_TOG: 0x00C
EXAMPLE
1288
8000_A0C0
8000_A0D0
8000_A0A0
8000_A0B0
8000_A0E0
8000_A0F0
8000_A080
8000_A090
8000_A100
8000_A110
8000_A120
8000_A130
8000_A140
8000_A150
8000_A160
Absolute
address
(hex)
(HW_BCH_CTRL)
Hardware BCH ECC Flash 0 Layout 0 Register
(HW_BCH_FLASH0LAYOUT0)
Hardware BCH ECC Flash 0 Layout 1 Register
(HW_BCH_FLASH0LAYOUT1)
Hardware BCH ECC Flash 1 Layout 0 Register
(HW_BCH_FLASH1LAYOUT0)
Hardware BCH ECC Flash 1 Layout 1 Register
(HW_BCH_FLASH1LAYOUT1)
Hardware BCH ECC Flash 2 Layout 0 Register
(HW_BCH_FLASH2LAYOUT0)
Hardware BCH ECC Flash 2 Layout 1 Register
(HW_BCH_FLASH2LAYOUT1)
Hardware BCH ECC Flash 3 Layout 0 Register
(HW_BCH_FLASH3LAYOUT0)
Hardware BCH ECC Flash 3 Layout 1 Register
(HW_BCH_FLASH3LAYOUT1)
Hardware BCH ECC Debug Register0 (HW_BCH_DEBUG0)
KES Debug Read Register (HW_BCH_DBGKESREAD)
Chien Search Debug Read Register
(HW_BCH_DBGCSFEREAD)
Syndrome Generator Debug Read Register
(HW_BCH_DBGSYNDGENREAD)
Bus Master and ECC Controller Debug Read Register
(HW_BCH_DBGAHBMREAD)
Block Name Register (HW_BCH_BLOCKNAME)
BCH Version Register (HW_BCH_VERSION)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_BCH memory map (continued)
Register name
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
Freescale Semiconductor, Inc.
10DA_8200h
10DA_8200h
10DA_8200h
10DA_8200h
070A_8200h
070A_8200h
070A_8200h
070A_8200h
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
2048_4342h
0100_0000h
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