MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1979

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
31.7.15 Device Interface Version Number (Non-EHCI-Compliant) Register
The device controller interface conforms to the two-byte BCD encoding of the interface
version number contained in this register.
Address:
Re-
Freescale Semiconductor, Inc.
set
Bit
W
R
DCIVERSION
31
0
31 16
RSVD
Field
ADC
Field
15 0
PFL
30
1
0
0
29
0
HW_USBCTRL_DCIVERSION
(HW_USBCTRL_DCIVERSION)
28
0
If this bit is set to a 1, then the host controller supports the park feature for high-speed queue heads in the
Asynchronous Schedule. The feature can be disabled or enabled and set to a specific level by using the
Asynchronous Schedule Park Mode Enable and Asynchronous Schedule Park Mode Count fields in the
USBCMD register.
Programmable Frame List Flag.
If this bit is set to 0, then the system software must use a frame list length of 1024 elements with this host
controller. The USBCMD register Frame List Size field is a read-only register and must be set to 0.
If set to a 1, then the system software can specify and use a smaller frame list and configure the host
controller through the USBCMD register Frame List Size field.
The frame list must always be aligned on a 4K page boundary. This requirement ensures that the frame list
is always physically contiguous.
64-bit Addressing Capability.
No 64-bit addressing capability is supported.
Reserved.
Two-byte BCD encoding of the interface version number.
27
0
HW_USBCTRL_HCCPARAMS field descriptions (continued)
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_USBCTRL_DCIVERSION field descriptions
RSVD
24
0
23
0
22
0
21
0
20
0
8008_0000h base + 120h offset = 8008_0120h
19
0
18
0
17
0
Chapter 31 USB High-Speed On-the-Go Host Device Controller
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
DCIVERSION
0
9
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
1979
1
0

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