MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2107

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

33.4.23 RGB to YCbCr 4:2:2 CSC Offset Register
HW_LCDIF_CSC_OFFSET register provides overall control over color space conversion
from RGB to 4:2:2 YCbCr. The equations for the conversion are given by: Y = C0*R +
C1*G + C2*B + Y_offset Cb= C3*R + C4*G + C5*B + CbCr_offset Cr= C6*R + C7*G
+ C8*B + CbCr_offset
This register carries programming information about RGB to YCbCr 4:2:2 CSC.
Address:
Re-
33.4.24 RGB to YCbCr 4:2:2 CSC Limit Register (HW_LCDIF_CSC_LIMIT)
HW_LCDIF_CSC_LIMIT register provides overall control over color space conversion
from RGB to 4:2:2 YCbCr. The equations for the conversion are given by:
Y = C0*R + C1*G + C2*B + Y_offset
Cb= C3*R + C4*G + C5*B + CbCr_offset
Cr= C6*R + C7*G + C8*B + CbCr_offset
The coefficients are as follows:
LCDIF_CSC_COEFF0.C0 = 0x41
LCDIF_CSC_COEFF1.C1 = 0x81
Freescale Semiconductor, Inc.
set
Bit
W
CBCR_OFFSET
R
Y_OFFSET
31
RSRVD1
RSRVD0
0
31 25
24 16
Field
15 9
8 0
30
0
29
RSRVD1
0
HW_LCDIF_CSC_OFFSET
(HW_LCDIF_CSC_OFFSET)
28
0
Reserved bits, write as 0.
Two's complement offset for the Cb and Cr components
Reserved bits, write as 0.
Two's complement offset for the Y component
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
HW_LCDIF_CSC_OFFSET field descriptions
0
23
1
22
CBCR_OFFSET
0
21
0
8003_0000h base + 160h offset = 8003_0160h
20
0
19
0
18
0
17
0
16
0
15
0
Description
14
0
13
RSRVD0
0
12
0
11
0
10
0
0
9
Chapter 33 LCD Interface (LCDIF)
0
8
0
7
0
6
Y_OFFSET
0
5
1
4
3
0
0
2
0
1
2107
0
0