MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2160

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
Address:
Re-
34.4.12 Source 0 Scale Factor Register (HW_PXP_S0SCALE)
S0 Scale Factor. This register provides the scale factor for the S0 (video) buffer.
The maximum down scaling factor is 1/4 such that the output image in either axis is 1/4th
the size of the source. The maximum up scaling factor is 2^12 for either axis. The reciprocal
of the scale factor should be loaded into this register. To reduce the S0 buffer by a factor
of two in the output frame buffer, a value of 10.0000_0000_0000 should be loaded into this
register. The scale up by a factor of 4, the value of 1/4, or 00.0100_0000_0000, should be
loaded into this register. To scale up by 8/5, the value of 00.1010_0000_0000 should be
loaded.
EXAMPLE
HW_PXP_S0SCALE_WR(0x10001000);
HW_PXP_S0SCALE_WR(0x08000800);
HW_PXP_S0SCALE_WR(0x20002000);
2160
set
Bit
W
R
31
0
HEIGHT
XBASE
YBASE
WIDTH
31 24
23 16
Field
15 8
7 0
30
0
29
0
HW_PXP_S0CROP
XBASE
28
0
This field indicates the horizontal offset (in terms of N-pixel blocks) into the S0 buffer which is considered
the origin of the image. This allows selection of a subset of a source image for processing.
This field indicates the vertical offset (in terms of N-pixel blocks) into the S0 buffer which is considered the
origin of the image. This allows selection of a subset of a source image for processing.
Ouput buffer cropped video width (in terms of N pixel blocks, non-rotated). This field should be programmed
to the desired cropped width of the S0 plane in the output buffer. When scaling is not used, this value is
effectively the width of the input buffer that should appear in the output buffer. For scaling operations, it's
important that this field be programmed to the width of the scaled size of the S0 output image.
Output buffer cropped video height (in terms of N pixel blocks, non-rotated).This field should be programmed
to the desired cropped height of the S0 plan in the output buffer. When scaling is not used, this value is
effectively the height of the input buffer that should appear in the output buffer. For scaling operations, it's
important that this field be programmed to the height of the scaled size of the S0 output image.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
0
HW_PXP_S0CROP field descriptions
8002_A000h base + A0h offset = 8002_A0A0h
22
0
21
// 1:1
// 2x
// 1/2x scaling (0x2.000)
0
YBASE
20
0
19
0
scaling (0x1.000)
scaling (0x0.800)
18
0
17
0
16
0
15
0
Description
14
0
13
0
WIDTH
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
HEIGHT
0
4
3
0
0
2
0
1
0
0