MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1895

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Address:
Freescale Semiconductor, Inc.
Reset
Reset
DEFAULT_
PRIORITY
VLAN_EN
Bit
Bit
W
W
MAC_EN
RSRVD1
RSRVD0
R
R
IP_EN
Field
31 7
6 4
3
2
1
0
31
15
0
0
HW_ENET_SWI_PRIORITY_CFG0
800F_8180h
30
14
0
0
Reserved bits. Write as 0.
The default priority of a frame received on port 0, if none of the priority resolutions could define a priority of
the frame. Up to 3 bits can be implemented.
Reserved bits. Write as 0.
Enable MAC based priority resolution for frame received on port n.
If set, the priority information found within the MAC address table is used.
Enable IP priority resolution for frame received on port n.
If set, the IP DiffServ/COS field is used and priority is resolved according to the IP_PRIORITYn setting for
the port.
If cleared, IP Diffserv/COS fields are ignored.
Enable VLAN priority resolution for frame received on port n.
If set, the VLAN tag field of a frame is inspected and priority is resolved according to the setting programmed
in VLAN_PRIORITYn for the port on which the frame was received.
If cleared, VLAN priority is ignored.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_SWI_PRIORITY_CFG0 field descriptions
28
12
0
0
RSRVD1[15:7]
27
11
0
0
26
10
0
0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
800F_8000h base + 180h offset =
25
0
0
9
RSRVD1[31:16]
24
0
0
8
Description
23
0
0
7
DEFAULT_PRIORITY
22
0
0
6
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
1895
16
0
0
0

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