MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1369

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

19.4.6 On-Chip Memories Read Margin Register
The On-Chip Memories Read Margin Register provide speed select settings for numerous
memories.
HW_DIGCTL_READ_MARGIN: 0x050
HW_DIGCTL_READ_MARGIN_SET: 0x054
HW_DIGCTL_READ_MARGIN_CLR: 0x058
HW_DIGCTL_READ_MARGIN_TOG: 0x05C
This register controls various parts of the on-chip RAM and ROM, including the sense amp
configuration.
Address:
Re-
19.4.7 Software Write-Once Register (HW_DIGCTL_WRITEONCE)
The Software Write-Once Register hold the value used in software certification management.
This register is used to hold a portion of a certificate that is not mutable after software
initialization.
EXAMPLE
Freescale Semiconductor, Inc.
set
Bit
W
R
31
0
RSVD0
ROM
Field
31 4
3 0
30
0
HW_DIGCTL_WRITEONCE.U = my_certificate;
29
0
(HW_DIGCTL_READ_MARGIN)
HW_DIGCTL_READ_MARGIN
28
0
Reserved.
This field is used for setting the read margin for the On-Chip ROM. It programs the sense amp differential
setting and allows the trade off between speed and robustness. This field should not be changed unless
instructed by Freescale.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_DIGCTL_READ_MARGIN field descriptions
24
0
23
0
22
0
21
0
20
0
8001_C000h base + 50h offset = 8001_C050h
19
0
RSVD0
18
0
17
0
16
0
15
0
Description
Chapter 19 Digital Control (DIGCTL) and On-Chip RAM
14
0
13
0
12
0
11
0
10
0
0
9
0
8
0
7
0
6
0
5
0
4
3
0
ROM
0
2
1
1
1369
0
0