MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 512

no-image

MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
HW_APBX_CTRL1: 0x010
HW_APBX_CTRL1_SET: 0x014
HW_APBX_CTRL1_CLR: 0x018
HW_APBX_CTRL1_TOG: 0x01C
This register contains the per channel interrupt status bits. Each channel has a dedicated
interrupt vector in the vectored interrupt controller.
EXAMPLE
BF_WR(APBX_CTRL1, CH5_CMDCMPLT_IRQ, 0);
BF_APBX_CTRL1.CH5_CMDCMPLT_IRQ = 0;
Address:
512
Reset
Reset
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
Bit
Bit
W
W
R
R
IRQ_EN
IRQ_EN
IRQ_EN
CH15_
CH14_
CH13_
Field
31
30
29
31
15
0
0
HW_APBX_CTRL1
30
14
0
0
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 15.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 14.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 13.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
8002_4000h base + 10h offset = 8002_4010h
HW_APBX_CTRL1 field descriptions
27
11
0
0
26
10
0
0
25
0
0
9
// use bitfield write macro
// or, assign to register struct's bitfield
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0

Related parts for MCIMX286CVM4B