MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1404

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
EXAMPLE
Address:
Re-
19.4.47 AHB Layer 3 Transfer Count Register
The AHB Layer 3 Transfer Count Register counts the number of AHB bus cycles during
which a transfer is active on AHB Layer 3.
This field counts the number of AHB cycles in which a master was requesting a transfer,
and the slave had not responded. This includes cycles in which it was requesting transfers
but was not granted them, as well as cycles in which it was granted and driving the bus but
the targeted slave was not ready. The master selects in
HW_DIGCTL_CTRL_MASTER_SELECT are used in the arbiter to mask which master\'s
cycles are actually recorded here.
EXAMPLE
NumberCycles = HW_DIGCTL_L3_AHB_ACTIVE_CYCLES_COUNT_RD();
1404
set
Bit
W
R
31
0
COUNT
Field
31 0
30
0
StartTime = HW_DIGCTL_HCLKCOUNT_RD();
while(HW_DIGCTL_L2_AHB_DATA_CYCLES.COUNT less than 1000000)
{
}
ElapsedTime = HW_DIGCTL_HCLKCOUNT_RD() - StartTime;
29
0
HW_DIGCTL_L2_AHB_DATA_CYCLES
8001_C3C0h
(HW_DIGCTL_L3_AHB_ACTIVE_CYCLES)
28
0
// wait for a specific number of xfers
This field contains the count of AHB bus cycles during which data was actually transferred from a master
to a slave or from a slave to a master.
27
0
HW_DIGCTL_L2_AHB_DATA_CYCLES field descriptions
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
0
22
0
21
0
20
0
19
0
18
0
8001_C000h base + 3C0h offset =
17
0
COUNT
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0