MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1772

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
27.5.13 I2C Device Debug Register 1 (HW_I2C_DEBUG1)
The I2C Device Debug Register 1 provides a diagnostic view of the external bus and provides
OE control for the clock and data.
HW_I2C_DEBUG1: 0x0c0
HW_I2C_DEBUG1_SET: 0x0c4
HW_I2C_DEBUG1_CLR: 0x0c8
HW_I2C_DEBUG1_TOG: 0x0cC
EXAMPLE
1772
START_TOGGLE
DMATERMINATE
GRAB_TOGGLE
STOP_TOGGLE
SLAVE_HOLD_
STATE_VALUE
DMAENDCMD
STATE_LATCH
SLAVE_STATE
DMA_STATE
CHANGE_
DMAKICK
TOGGLE
27 26
25 16
Field
CLK
9 0
30
29
28
15
14
13
12
11
10
Read-only view of the toggle state of the DMA End Command signal.
Read-only view of the toggle state of the DMA Kick signal.
Read-only view of the toggle state of the DMA Terminate signal.
This field contains the lower two bit values of the DMA state machine variable. This value is fixed or
free-running based on the STATE_LATCH bit in this register. This field is used for debug purposes.
Current state of the DMA state machine.
Read-only view of the start detector. Toggles once for each detected start condition.
Read-only view of the stop detector. Toggles once for each detected stop condition.
Read-only view of the grab receive data timing point. Toggles once for each read timing point, as delayed
from rising clock.
Read-only view of the change xmit data timing point. Toggles once for each change xmit data timing point,
as delayed from falling clock.
Changing this bit from a 1 to 0 latches the lower two bits of the current DMA state machine variable into
the STATE_VALUE field of this register. A value of 1 causes the STATE_VALUE field to be free-runing.
Current State of the Slave Address Search FSM clock hold register.
Current State of the Slave Address Search FSM.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_I2C_DEBUG0 field descriptions (continued)
Description
Freescale Semiconductor, Inc.