MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1643

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
within the 1 second period. When the period is reached, the counter wraps to start again
respecting the period modulo. This means it will not necessarily start from 0 but instead the
counter will be loaded with the value (current + inc - (1*10
to 1*10
The correction counter operates fully independently and increments by 1 with each clock
cycle (CLK_ENET_TIME). When it reaches the value configured in ATIME_CORR, it
restarts and instructs the timer once to increment by the correction value, instead of the
normal value. The normal and correction increments are configured in register ATIME_INC.
To speed up the timer, the correction increment would be larger than the normal increment
value. To slow down the timer, the correction increment would be smaller than the normal
increment value. Note that the correction counter only defines the distance of the corrective
actions, not the amount. This allows very fine corrections (and hence low jitter) happening
in the range of 1ns independently from the chosen clock frequency.
By enabling the slave mode (ATIME_CTRL(FRC_SLAVE)), the timer is ignored and the
current time is the externally provided time from pins frc_in(). This is useful if multiple
modules within the system need to operate from a single timer (see below).
When slave mode is enabled, it is still required to set the ATIME_INC(6:0) increment value
to the value of the master as it is used for internal comparisons.
26.3.13.3 Timer Synchronization for Multi-Port Implementations
An additional timer input is available on the Core toplevel pins frc_in() to allow to use an
externally provided timer value for all time stamping functions. This is necessary if multiple
instances (ports) of the MAC should be synchronized to a single reference timer in the
system. In i.MX28, ENET-MAC0 is used as master, so the timer input (frc_in) of
ENET_MAC0 is unused and wired to all 0. The FRC value of ENET_MAC0 is wired to
frc_in of ENET_MAC1 (acting as slave). To operate the MAC in Slave mode, the timer
module configuration ATIME_CTRL(FRC_SLAVE) is used to disable the internal adjustable
timer and use only the externally provided time value.
Freescale Semiconductor, Inc.
9
.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 26-20. 1588 Multiple MAC implementation
frc_in
10/100 MAC
(mac0 as master)
Timing
Timing Master
Timer Module
Adjustable
(tsm)
MAC with 1588
Events
gen.
frc
frc_in
10/100 MAC
Timing Slave
(mac1 as slave)
MAC with 1588
Timing
9
)) assuming the period was set
Chapter 26 Ethernet Controller (ENET)
Events
gen.
1643

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