MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 553

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Address:
Freescale Semiconductor, Inc.
Reset
Reset
WAIT4ENDCMD
XFER_COUNT
IRQONCMPLT
SEMAPHORE
CMDWORDS
Bit
Bit
W
W
R
R
RSVD1
RSVD0
31 16
15 12
11 8
Field
5 4
7
6
3
31
15
0
0
HW_APBX_CH4_CMD
CMDWORDS
30
14
0
0
This field indicates the number of bytes to transfer to or from the SAIF0 device. A value of 0 indicates a 64
KBytes transfer.
This field indicates the number of command words to send to the SAIF0. Zero means transfer NO command
words
Reserved, always set to zero.
A value of one indicates that the channel will wait for the end of command signal to be sent from the APBX
device to the DMA before starting the next DMA command.
A value of one indicates that the channel will decrement its semaphore at the completion of the current
command structure. If the semaphore decrements to zero, then this channel stalls until software increments
it again.
Reserved, always set to zero.
A value of one indicates that the channel will cause its interrupt status bit to be set upon completion of the
current command, i.e. after the DMA transfer is complete.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_APBX_CH4_CMD field descriptions
27
11
0
0
8002_4000h base + 2E0h offset = 8002_42E0h
26
10
0
0
RSVD1
25
0
0
9
XFER_COUNT
Chapter 7 AHB-to-APBX Bridge with DMA (APBX-Bridge-DMA)
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
RSVD0
20
0
4
0
19
0
0
3
18
0
0
2
COMMAND
17
0
0
1
16
0
0
0
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