MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2085

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

33.4.2 LCDIF General Control1 Register (HW_LCDIF_CTRL1)
The LCDIF Control Register provides overall control of the LCDIF block.
HW_LCDIF_CTRL1: 0x010
HW_LCDIF_CTRL1_SET: 0x014
HW_LCDIF_CTRL1_CLR: 0x018
HW_LCDIF_CTRL1_TOG: 0x01C
The LCDIF Control1 Register provides additional programming to the LCDIF. It implements
some bits which are unlikely to change often in a particular application. It also carries
interrupt-related bits which are common across more than one mode of operation.
Address:
Freescale Semiconductor, Inc.
Reset
DATA_FORMAT_
Bit
W
R
24_BIT
Field
RUN
1
0
31
0
HW_LCDIF_CTRL1
30
RSRVD1
0
0x0
0x1
Used only when WORD_LENGTH = 3, i.e. 24-bit. Note that this applies to both packed and unpacked 24-bit
data.
0x0
0x1
When this bit is set by software, the LCDIF will start fetching data in either the DMA mode or the bus master
mode and sending it across the interface. This bit must remain set for all the time the block is in operation.
29
0
LOWER_18_BITS_VALID — Data input to the block is in 18 bpp format, such that lower 18 bits
contain RGB 666 and upper 14 bits do not contain any useful data.
UPPER_18_BITS_VALID — Data input to the block is in 18 bpp format, such that upper 18 bits
contain RGB 666 and lower 14 bits do not contain any useful data.
ALL_24_BITS_VALID — Data input to the block is in 24 bpp format, such that all RGB 888 data is
contained in 24 bits.
DROP_UPPER_2_BITS_PER_BYTE — Data input to the block is actually RGB 18 bpp, but there is
1 color per byte, hence the upper 2 bits in each byte do not contain any useful data, and should be
dropped.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_LCDIF_CTRL field descriptions (continued)
28
0
8003_0000h base + 10h offset = 8003_0010h
27
0
26
0
25
0
24
0
Description
23
0
22
0
21
0
Chapter 33 LCD Interface (LCDIF)
20
0
19
BYTE_PACKING_FORMAT
1
18
1
17
1
2085
16
1