MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1165

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

14.8.65 DRAM Control Register 70 (HW_DRAM_CTL70)
This is a DRAM configuration register.
Freescale Semiconductor, Inc.
WRLAT_BASE
TDFI_PHY_
TDFI_PHY_
RSVD1
WRLAT
Field
11 8
7 4
3 0
Sets DFI base value for the tPHY_WRLAT timing parameter.
Used to adjust the tdfi_phy_wrlat parameter for the difference between the PHY's command path delay and
data path delay.
'b0000 = Command path delay is 2 cycles shorter than the data path delay.
'b0001 = Command path delay is 1 cycle shorter than the data path delay.
'b0010 = Command path delay and data path delay are equivalent.
'b0011 = Command path delay is 1 cycle longer than the data path delay.
'b0100 = Command path delay is 2 cycles longer than the data path delay.
'b0101 = Command path delay is 3 cycles longer than the data path delay.
'b0110, etc.
Always write zeroes to this field.
Holds the calculated DFI tPHY_WRLAT timing parameter. READ-ONLY
Holds the calculated value of the tphy_wrlat timing parameter and is used to adjust the dfi_wrdata_en signal
timing. This equation is dependent on the latency setting for the address / control path of the PHY as set in
the phy_ctrl_reg_2 [25] parameter bit.
If phy_ctrl_reg_2 [25] = 0:
If (tdfi_phy_wrlat_base + wrlat_adj) = 2:
tdfi_phy_wrlat = reg_dimm_enable
If (tdfi_phy_wrlat_base + wrlat_adj) > 2:
tdfi_phy_wrlat = tdfi_phy_wrlat_base + wrlat_adj + reg_dimm_enable - WRLAT_WIDTH'h3
Values of (tdfi_phy_wrlat_base + wrlat_adj) < 2 are not supported.
If phy_ctrl_reg_2 [25] = 1:
If (tdfi_phy_wrlat_base + wrlat_adj) < 4:
tdfi_phy_wrlat = reg_dimm_enable
If (tdfi_phy_wrlat_base + wrlat_adj) >= 4:
tdfi_phy_wrlat = tdfi_phy_wrlat_base + wrlat_adj + reg_dimm_enable - WRLAT_WIDTH'h4
This parameter is read-only.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_DRAM_CTL69 field descriptions (continued)
Description
Chapter 14 External Memory Interface (EMI)
1165