MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1227

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
14.8.168 DRAM Control Register 179 (HW_DRAM_CTL179)
This is a DRAM configuration register.
Address:
Freescale Semiconductor, Inc.
Reset
Reset
CURRENT_BDW
AXI5_BDW
AXI4_BDW
Bit
Bit
W
W
TCKESR
R
R
RSVD4
RSVD3
RSVD2
RSVD1
30 24
22 16
AXI4_
Field
14 8
7 5
4 0
RSVD2
31
23
15
15
31
0
0
HW_DRAM_CTL179
14
30
0
0
Always write zeroes to this field.
Maximum bandwidth percentage for port 5.
Always write zeroes to this field.
Current bandwidth usage percentage for port 4. READ-ONLY.
Always write zeroes to this field.
Maximum bandwidth percentage for port 4.
Always write zeroes to this field.
Minimum CKE low pulse width during a self-refresh.
Defines the minimum number of cycles that CKE must be held low during self-refresh. pulse width, in cycles.
If the memory specification does not define a tckesr, then the tckesr parameter should be programmed with
the tcke value.
13
29
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
12
28
0
0
RSVD3
AXI4_BDW
HW_DRAM_CTL178 field descriptions
800E_0000h base + 2CCh offset = 800E_02CCh
11
27
0
0
10
26
0
0
25
0
0
9
24
0
0
8
Description
23
0
0
7
RSVD2
RSVD1
22
0
0
6
Chapter 14 External Memory Interface (EMI)
21
5
0
0
TDFI_PHYUPD_TYPE1[21:16]
20
4
0
0
19
0
0
3
TCKESR
18
0
0
2
17
0
0
1
1227
16
0
0
0

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