MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 83

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Section Number
Freescale Semiconductor, Inc.
37.1
37.2
37.3
Overview.....................................................................................................................................................................2239
High-Speed ADC Block Features...............................................................................................................................2240
Operation....................................................................................................................................................................2242
36.3.2
36.3.3
36.3.4
36.3.5
36.3.6
36.3.7
37.2.1
37.2.2
37.2.3
37.2.4
37.2.5
37.2.6
37.3.1
37.3.2
37.3.3
37.3.4
37.3.5
37.3.6
37.3.7
37.3.8
37.3.9
37.3.10
SPDIF Status Register (HW_SPDIFSTAT).............................................................................................2231
SPDIF Frame Control Register (HW_SPDIFFRAMECTRL)................................................................2232
SPDIF Sample Rate Register (HW_SPDIFSRR)....................................................................................2234
SPDIF Debug Register (HW_SPDIFDEBUG).......................................................................................2235
SPDIF Write Data Register (HW_SPDIFDATA)....................................................................................2236
SPDIF Version Register (HW_SPDIFVERSION)..................................................................................2237
Sample Rate and Sample Precision.........................................................................................................2240
Trigger Modes.........................................................................................................................................2241
APBH-DMA Channel.............................................................................................................................2241
Synchronization with PWM Block..........................................................................................................2241
Clock Domains........................................................................................................................................2241
Sample Precision, Endian, Half-word Swap and Bits Left-Shift............................................................2241
Trigger Modes.........................................................................................................................................2243
Sample Data Bits Left Shift.....................................................................................................................2244
Bits Location...........................................................................................................................................2245
Configuration of APBH-DMA................................................................................................................2245
Configuration of PWM............................................................................................................................2246
Configuration of High-speed ADC..........................................................................................................2246
Interrupt Sources.....................................................................................................................................2247
Working Modes.......................................................................................................................................2247
Debugging Information...........................................................................................................................2248
Behavior During Reset............................................................................................................................2248
37.3.8.1
37.3.8.2
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Single Mode..........................................................................................................................2247
Loop Mode............................................................................................................................2247
High-Speed ADC (HSADC)
Chapter 37
Title
Page
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