MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 527
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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7.5.11 AHB to APBX DMA Channel 0 Debug Information
This register gives debug visibility into the APBX DMA Channel 0 state machine and
controls.
This register allows debug visibility of the APBX DMA Channel 0.
Address:
Freescale Semiconductor, Inc.
Reset
INCREMENT_
Bit
W
R
PHORE
RSVD1
23 16
SEMA
Field
15 8
7 0
REQ
31
0
(HW_APBX_CH0_DEBUG1)
HW_APBX_CH0_DEBUG1 8002_4000h base + 150h offset = 8002_4150h
30
0
This read-only field shows the current (instantaneous) value of the semaphore counter.
Reserved, always set to zero.
The value written to this field is added to the semaphore count in an atomic way such that simultaneous
software adds and DMA hardware substracts happening on the same clock are protected. This bit field reads
back a value of 0x00. Writing a value of 0x02 increments the semaphore count by two, unless the DMA
channel decrements the count on the same clock, then the count is incremented by a net one.
KICK
HW_APBX_CH0_SEMA field descriptions (continued)
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
END
28
0
27
0
RSVD2
26
0
25
0
Chapter 7 AHB-to-APBX Bridge with DMA (APBX-Bridge-DMA)
24
0
Description
23
1
22
0
21
1
20
0
19
0
RSVD1[19:16]
18
0
17
0
16
0
527
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