MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2158

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
34.4.9 PXP Source 0 (video) Buffer Parameters (HW_PXP_S0PARAM)
This register contains buffer information for the S0 input RGB/YUV buffer.
The S0 Parameter register contains the size of the S0 input buffer (WIDTH, HEIGHT) as
well as provides an offset for the display of this buffer within the output frame buffer
(XBASE,YBASE). All four values are in terms of NxN pixel blocks. In 16 pixel block size
mode, only the low 7 bits of each field can be used and the most significant bit must be set
to 0.
EXAMPLE
HW_PXP_S0PARAM_WR(0x0101281E); // S0 buffer will appear at offset (8,8) in the output buffer.
Address:
Re-
34.4.10 Source 0 Background Color (HW_PXP_S0BACKGROUND)
S0 Background Pixel Color. This register provides a pixel value used when processing
blocks outside of the region specified by the S0SIZE register. This value can effectively be
used to set the color of the letterboxing region around a video image.
This register contains a pixel value to be used for any S0 blocks that fall outside the S0
extents. This is effectively a background or letterbox color.
2158
set
Bit
W
R
31
0
HEIGHT
XBASE
YBASE
WIDTH
31 24
23 16
Field
15 8
7 0
30
0
29
0
HW_PXP_S0PARAM
XBASE
28
0
This field indicates the horizontal offset location (in NxN block) of the S0 buffer within the output frame buffer.
This field indicates the vertical offset location (in NxN block) of the S0 buffer within the output frame buffer.
Indicates number of horizontal NxN blocks in the image (non-rotated).
Indicates the number of vertical NxN blocks in the image (non-rotated).
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
0
HW_PXP_S0PARAM field descriptions
8002_A000h base + 80h offset = 8002_A080h
22
0
// the size is 0x28 (40*8=320 pixels) by 0x1E (30*8=240 pixels)
21
0
YBASE
20
0
19
0
18
0
17
0
16
0
15
0
Description
14
0
13
0
WIDTH
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
HEIGHT
0
4
3
0
0
2
0
1
0
0

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