MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1848

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
29.9.5 ENET SWI Default broadcast resolution.
For broadcast/flooding resolution, the default output port list
1848
Reset
VLAN_VERIFY_2
VLAN_VERIFY_1
VLAN_VERIFY_0
DISCARD_P2
DISCARD_P1
DISCARD_P0
Bit
W
RSRVD1
RSRVD0
R
31 19
Field
15 3
18
17
16
2
1
0
15
0
(HW_ENET_SWI_BCAST_DEFAULT_MASK)
14
0
Reserved bits. Write as 0.
Discard unknown on port 2.
When set, and a frame is received with a VLAN ID that is unknown, or has no VLAN tag, the frame is
discarded and not forwarded (i.e. the default bcast is ignored).
Discard unknown on port 1.
When set, and a frame is received with a VLAN ID that is unknown, or has no VLAN tag, the frame is
discarded and not forwarded (i.e. the default bcast is ignored).
Discard unknown on port 0.
When set, and a frame is received with a VLAN ID that is unknown, or has no VLAN tag, the frame is
discarded and not forwarded (i.e. the default bcast is ignored).
Reserved bits. Write as 0.
Verify VLAN domain on port 2.
When enabled (Bit=1) a frame is accepted from the port as valid only when the input and output ports are
members of the VLAN domain of the frame.
When disabled (Bit=0) frames are routed to the output port without VLAN domain checking.
Verify VLAN domain on port 1.
When enabled (Bit=1) a frame is accepted from the port as valid only when the input and output ports are
members of the VLAN domain of the frame.
When disabled (Bit=0) frames are routed to the output port without VLAN domain checking.
Verify VLAN domain on port 0.
When enabled (Bit=1) a frame is accepted from the port as valid only when the input and output ports are
members of the VLAN domain of the frame.
When disabled (Bit=0) frames are routed to the output port without VLAN domain checking.
13
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_SWI_VLAN_VERIFY field descriptions
12
0
11
0
10
0
RSRVD0
0
9
0
8
Description
0
7
0
6
5
0
4
0
Freescale Semiconductor, Inc.
0
3
0
2
0
1
0
0