MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1357

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

A 32-bit AHB address is arranged as shown below.
The on-chip RAM and controller work at full CLK_H frequency without additional wait
states. There is no memory repair for the SRAM.
19.3 Miscellaneous Controls
The digital control block also contains a number of other miscellaneous functions, as detailed
in this section.
19.3.1 Performance Monitoring
The digital control block contains several registers for system bus performance monitoring,
including HW_DIGCTL_HCLKCOUNT, which counts HCLK rising edges. This register
counts at a variable rate as HW_CLKCTRL_HBUS_AUTO_SLOW_ MODE is enabled.
In addition, there exists a performance monitoring register for each AHB layer (L0–L3).
The HW_DIGCTL_L(n)_AHB_DATA_STALLED and
HW_DIGCTL_L(n)_AHB_ACTIVE_CYCLES registers can be used to measure AHB bus
utilization. The Stalled register counts all cycles in which any device has an outstanding
Freescale Semiconductor, Inc.
AHB ADDR
BITS
16:4
3:2
1:0
Address
Bank Address
Byte Address
USAGE
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 19-1. On-Chip RAM Address Bits
Figure 19-2. On-Chip RAM Partitioning
Selects one of 8 K words in a bank.
Selects 1 of 4 physical 32 KB banks.
Selects/masks out specific bytes within a word.
DESCRIPTION
0x0000_000C
0x0000_001C
0x0000_0000
0x0000_0010
0x0000_0004
0x0000_0014
0x0000_0008
0x0000_0018
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Chapter 19 Digital Control (DIGCTL) and On-Chip RAM
Bank 3
Bank 2
Bank 1
Bank 0
0
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