MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1967

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

31.7.1 Identification Register (HW_USBCTRL_ID)
The Identification Register provides a simple way to determine if the USB-HS USB 2.0
core is provided in the system. The HW_USBCTRL_ID register identifies the USB-HS
USB 2.0 core and its revision. The default value of this register is 0xE241FA05.
Address:
Re-
Freescale Semiconductor, Inc.
set
Bit
W
8008_01BC
8008_01CC
8008_01DC
R
8008_01C0
8008_01C4
8008_01C8
8008_01D0
8008_01D4
8008_01D8
Absolute
address
CIVERSION
REVISION
VERSION
31
CIVERSION
(hex)
1
RSVD1
31 29
28 25
24 21
20 16
15 14
Field
13 8
TAG
NID
30
1
29
1
HW_USBCTRL_ID
Endpoint Complete Register
(HW_USBCTRL_ENDPTCOMPLETE)
Endpoint Control 0 Register (HW_USBCTRL_ENDPTCTRL0)
Endpoint Control 1 Register (HW_USBCTRL_ENDPTCTRL1)
Endpoint Control 2 Register (HW_USBCTRL_ENDPTCTRL2)
Endpoint Control 3 Register (HW_USBCTRL_ENDPTCTRL3)
Endpoint Control 4 Register (HW_USBCTRL_ENDPTCTRL4)
Endpoint Control 5 Register (HW_USBCTRL_ENDPTCTRL5)
Endpoint Control 6 Register (HW_USBCTRL_ENDPTCTRL6)
Endpoint Control 7 Register (HW_USBCTRL_ENDPTCTRL7)
28
0
VERSION
Identifies the Chip Idea product version of the USB-HS USB 2.0 core.
Identifies the version of the USB-HS USB 2.0 core release. (<version>.<revision><tag>)
Identifies the revision of the USB-HS USB 2.0 core release. (<version>.<revision><tag>)
Identifies the tag of the USB-HS USB 2.0 core release. (<version>.<revision><tag>)
Reserved.
One's complement version of ID[5:0].
27
0
26
1
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
REVISION
HW_USBCTRL memory map (continued)
23
0
8008_0000h base + 0h offset = 8008_0000h
HW_USBCTRL_ID field descriptions
Register name
22
0
21
0
20
0
19
0
TAG
18
0
17
0
Chapter 31 USB High-Speed On-the-Go Host Device Controller
16
1
RSVD1
15
1
Description
14
1
13
1
12
1
(in bits)
Width
32
32
32
32
32
32
32
32
32
11
1
NID
10
0
Access
1
9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
8
RSVD0
0
7
Reset value
0000_0000h
0080_0080h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0
6
0
5
0
4
3
0
31.7.39/2016
31.7.40/2017
31.7.41/2019
31.7.42/2022
31.7.43/2023
31.7.44/2025
31.7.45/2026
31.7.46/2028
31.7.47/2029
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