MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1457

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

20.4.35 Shadow Register for OTP Bank4 Word0 (Data Use 0)
Copied from the OTP automatically after reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS].
Shadowed memory mapped access to OTP Bank 4, word 0 (ADDR = 0x20).
Address:
Re-
20.4.36 Shadow Register for OTP Bank4 Word1 (Data Use 1)
Copied from the OTP automatically after reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS].
Shadowed memory mapped access to OTP Bank 4, word 1 (ADDR = 0x21).
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
31
31
0
0
Field
31 0
BITS
Field
31 0
BITS
30
30
0
0
29
29
0
0
HW_OCOTP_SRK0
HW_OCOTP_SRK1
(HW_OCOTP_SRK0)
(HW_OCOTP_SRK1)
28
28
0
0
Shadow register for the hash of the Super Root Key word0. If HAB is not required, these fuses can be used
for other purposes (Copy of OTP Bank 4, word 0 (ADDR = 0x20)). These bits become read-only after the
HW_OCOTP_LOCK[SRK_SHADOW] bit is set.
Shadow register for the hash of the Super Root Key word1. If HAB is not required, these fuses can be used
for other purposes (Copy of OTP Bank 4, word 1 (ADDR = 0x21)). These bits become read-only after the
HW_OCOTP_LOCK[SRK_SHADOW] bit is set.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
23
23
0
0
HW_OCOTP_SRK0 field descriptions
HW_OCOTP_SRK1 field descriptions
8002_C000h base + 220h offset = 8002_C220h
8002_C000h base + 230h offset = 8002_C230h
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
16
16
0
0
BITS
BITS
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
Chapter 20 On-Chip OTP (OCOTP) Controller
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
1457
0
0
0
0