MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 680

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Operation
Readback registers are never affected by the operation of the HW_PINCTRL_MUXSELx
registers and always sense the actual value on the data pin.
For example, if a pin is programmed to be a GPIO output and then driven high, then any
specialized hardware interfaces that are actively monitoring that pin will read the high logic
value. Conversely, if the pin mux is programmed to give a specialized hardware interface
such as the GPMI block control of a particular pin, the current state of that pin can be read
through its GPIO read register at any time, even while active GPMI cycles are in progress.
This is not true for the EMI pads that are GPIO capable due to the pad design.
Because the pin mux configuration is independent for each individual pin, many pins which
are not required for a given active interface can be reused as GPIO pins. For example, the
LCD_RESET pin can be configured and controlled as a GPIO pin, while the other LCD
interface pins are still controlled by the LCDIF.
Banks 5 and 6 are for the EMI only and do not have GPIO capability.
9.2.2.1 Pin Drive Strength Selection
The drive strength for each digital pin can be programmed by setting the bit corresponding
to that pin in one of the HW_PINCTRL_DRIVEx registers. All digital pins have selectable
output drive strengths of 4, 8, and 12 mA, with the following exceptions:
680
B a n k
Mux
Reg
lect
lect
lect
lect
se-
se-
se-
se-
13
00
01
10
11
6
=
=
=
=
31
31
30
29
30
28
27
29
26
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
28
24
23
22
21
26
20
19
25
18
17
abled
dis-
24
16
15
abled
dis-
23
14
13
abled
dis-
22
12
11
abled
dis-
21
10
abled
9
dis-
20
8
Freescale Semiconductor, Inc.
abled
7
dis-
19
6
abled
5
dis-
18
4
abled
3
dis-
17
2
abled
1
dis-
16
0