MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1018

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programming DCP Functions
<code>
typedef struct _dcp_descriptor
{
}
</code>
13.2.7.2 Basic Hash Operation Programming Example
To perform a basic hash operation, only a single descriptor is required. The DCP simply
reads data from the source buffer and computes the hash value on the contents. This process
is illustrated below.
1018
DCP_DESCRIPTOR dcp1;
u32 *srcbuffer, *dstbuffer;
// set up control packet
dcp1.next = 0;
dcp1.ctrl0.U = 0;
dcp1.ctrl0.B.ENABLE_MEMCOPY = 1; // enable memcopy
dcp1.ctrl0.B.DECR_SEMAPHORE = 1; // decrement semaphore
dcp1.ctrl0.B.INTERRUPT = 1;
dcp1.ctrl1.U = 0;
dcp1.src = srcbuffer;
dcp1.dst = dstbuffer;
dcp1.buf_size = 512;
dcp1.payload = NULL;
dcp1.status = 0;
// Enable channel 0
HW_DCP_CHnCMDPTR_WR(0, dcp1);
HW_DCP_CHnSEMA_WR(0, 1);
// now wait for interrupt or poll
// polling code
while ( (HW_DCP_STAT_RD() & 0x01) == 0x00 );
// now check/clear channel status
if ( (HW_DCP_CHnSTAT_RD(0) & 0xFF) != 0 ) {
}
// clear interrupt register
HW_DCP_STAT_CLR(1);
DCP_DESCRIPTOR;
u32
hw_dcp_packet1_t
hw_dcp_packet2_t
u32
// an error occurred
HW_DCP_CHnSTAT_CLR(0, 0xff);
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
*next;
*src,
*dst,
*payload,
ctrl0;
ctrl1;
buf_size,
stat;
// single packet in chain
// clear ctrl0 field
// interrupt
// clear ctrl1
// source buffer
// destination buffer
// 512 bytes
// not required
// clear status
// write packet address to pointer register
// increment semaphore by 1
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